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Joel Ferguson
Joel Ferguson
Professor of Computer Engineering, University of California Santa Cruz
Verified email at ucsc.edu - Homepage
Title
Cited by
Cited by
Year
Inductive fault analysis of MOS integrated circuits
JP Shen, W Maly, FJ Ferguson
IEEE Design & Test of Computers 2 (6), 13-26, 1985
6501985
Extraction and simulation of realistic CMOS faults using inductive fault analysis
FJ Ferguson, JP Shen
Proc. Int. Test Conf, 475-484, 1988
3111988
Defect classes-an overdue paradigm for CMOS IC testing
CF Hawkins, JM Soden, AW Righter, FJ Ferguson
Proceedings., International Test Conference, 413-425, 1995
2711995
A CMOS fault extractor for inductive fault analysis
FJ Ferguson, JP Shen
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1988
2701988
Carafe: An inductive fault analysis tool for CMOS VLSI circuits
A Jee, FJ Ferguson
Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium, 92-98, 1993
2361993
Test pattern generation for realistic bridge faults in CMOS ICs
FJ Ferguson, T Larrabee
University of California, Santa Cruz, Computer Research Laboratory, 1991
2001991
Systematic characterization of physical defects for fault analysis of MOS IC cells
W Maly, FJ Ferguson, JP Shen
Proceedings of the 1984 international test conference on The three faces of …, 1984
1521984
The design of easily testable VLSI array multipliers
Shen, Ferguson
IEEE Transactions on Computers 100 (6), 554-560, 1984
1421984
Testing for parametric faults in static CMOS circuits
FJ Ferguson, M Taylor, T Larrabee
Proceedings. International Test Conference 1990, 436-443, 1990
1181990
Diagnosing realistic bridging faults with single stuck-at information
DB Lavo, B Chess, T Larrabee, FJ Ferguson
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1998
791998
Diagnosis of realistic bridging faults with single stuck-at information
B Chess, DB Lavo, FJ Ferguson, T Larrabee
Proceedings of IEEE International Conference on Computer Aided Design (ICCAD …, 1995
791995
Testing CMOS logic gates for: Realistic shorts
B Chess, A Freitas, FJ Ferguson, T Larrabee
Proceedings., International Test Conference, 395-402, 1995
541995
On state reduction of incompletely specified finite state machines
S Gören, FJ Ferguson
Computers & Electrical Engineering 33 (1), 58-69, 2007
472007
Oscillation and sequential behavior caused by interconnect opens in digital CMOS circuits
H Konuk, FJ Ferguson
Proceedings International Test Conference 1997, 597-606, 1997
391997
Bridging fault diagnosis in the absence of physical information
DB Lavo, B Chess, T Larrabee, FJ Ferguson, J Saxena, KM Butler
Proceedings International Test Conference 1997, 887-893, 1997
381997
An unexpected factor in testing for CMOS opens: The die surface
H Konuk, FJ Ferguson
Proceedings of 14th VLSI Test Symposium, 422-429, 1996
371996
On applying non-classical defect models to automated diagnosis
J Saxena, KM Butler, H Balachandran, DB Lavo, B Chess, T Larrabee, ...
Proceedings International Test Conference 1998 (IEEE Cat. No. 98CH36270 …, 1998
361998
Method for diagnosing bridging faults in integrated circuits
FJ Ferguson, T Larabee, B Chess, DB Lavo
US Patent 6,560,736, 2003
352003
Carafe: An inductive fault analysis tool for CMOS VLSI circuits
AL Jee
University of California at Santa Cruz, 1991
341991
Method for diagnosing bridging faults in integrated circuits
FJ Ferguson, T Larabee, B Chess, DB Lavo
US Patent 6,202,181, 2001
332001
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