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Shruti Padmanabha
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Composite cores: Pushing heterogeneity into a core
A Lukefahr, S Padmanabha, R Das, FM Sleiman, R Dreslinski, ...
2012 45th annual IEEE/ACM international symposium on microarchitecture, 317-328, 2012
2162012
Trace based phase prediction for tightly-coupled heterogeneous cores
S Padmanabha, A Lukefahr, R Das, S Mahlke
Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013
702013
Heterogeneous microarchitectures trump voltage scaling for low-power cores
A Lukefahr, S Padmanabha, R Das, R Dreslinski Jr, TF Wenisch, ...
Proceedings of the 23rd international conference on Parallel architectures …, 2014
492014
DynaMOS: Dynamic schedule migration for heterogeneous cores
S Padmanabha, A Lukefahr, R Das, S Mahlke
Proceedings of the 48th International Symposium on Microarchitecture, 322-333, 2015
292015
Taiji: managing global user traffic for large-scale internet services at the edge
D Chou, T Xu, K Veeraraghavan, A Newell, S Margulis, L Xiao, PM Ruiz, ...
Proceedings of the 27th ACM Symposium on Operating Systems Principles, 430-446, 2019
282019
Maelstrom: Mitigating datacenter-level disasters by draining interdependent traffic safely and efficiently
K Veeraraghavan, J Meza, S Michelson, S Panneerselvam, A Gyori, ...
13th USENIX Symposium on Operating Systems Design and Implementation (OSDI …, 2018
252018
Exploring fine-grained heterogeneity with composite cores
A Lukefahr, S Padmanabha, R Das, FM Sleiman, RG Dreslinski, ...
IEEE Transactions on Computers 65 (2), 535-547, 2015
162015
Heterogeneity within a processor core
A Lukefahr, R Das, S Padmanabha, S Mahlke
US Patent 9,639,363, 2017
142017
Mirage cores: The illusion of many out-of-order cores using in-order hardware
S Padmanabha, A Lukefahr, R Das, S Mahlke
Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017
122017
Control of switching between executed mechanisms
S Padmanabha, A Lukefahr, R Das, S Mahlke
US Patent 9,870,226, 2018
72018
Reetuparna Das, Ronald Dreslinski Jr, Thomas F Wenisch, and Scott Mahlke. 2014. Heterogeneous microarchitectures trump voltage scaling for low-power cores
A Lukefahr, S Padmanabha
Proceedings of the 23rd international conference on Parallel architectures …, 0
7
Recording performance metrics to predict future execution of large instruction sequences on either high or low performance execution circuitry
S Padmanabha, A Lukefahr, R Das, S Mahlke
US Patent 9,965,279, 2018
62018
Method of detecting repetition of an out-of-order execution schedule, apparatus and computer-readable medium
S Padmanabha, A Lukefahr, R Das, S Mahlke
US Patent 10,613,866, 2020
22020
Systems and methods for routing network data based on social connections of users
DSH Chou, T Xu, K Veeraraghavan, AJ Newell, S Margulis, L Xiao, ...
US Patent 11,621,891, 2023
12023
Systems and methods for dynamically generating routing tables for edge nodes in large-scale networking infrastructures
DSH Chou, T Xu, K Veeraraghavan, AJ Newell, S Margulis, L Xiao, ...
US Patent 10,931,743, 2021
12021
Controlling transition between using first and second processing circuitry
A Lukefahr, S Padmanabha, R Das, S Mahlke, YU Jiecao
US Patent 10,310,858, 2019
2019
Energy Efficient Heterogeneous Processor Architectures for General Purpose Applications
S Padmanabha
2016
Alaa Alameldeen, Intel Mahdi Nazm Bojnordi, University of Utah Anirudh Badam, Microsoft Pradip Bose, IBM Research
D Brooks, R Canal, N Chatterjee, L Cheng, J Clemons, L Eeckhout, ...
Adaptive Cache Partitioning on a Composite Core
J Yu, A Lukefahr, S Padmanabha, R Das, S Mahlke
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