Andrea Pellegrini
Andrea Pellegrini
Senior Principal Engineer, ARM Advanced Server Team
Verified email at
Cited by
Cited by
Fault-based attack of RSA authentication
A Pellegrini, V Bertacco, T Austin
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework
A Pellegrini, K Constantinides, D Zhang, S Sudhakar, V Bertacco, T Austin
2008 IEEE International Conference on Computer Design, 363-370, 2008
Crashtest'ing swat: Accurate, gate-level evaluation of symptom-based resiliency solutions
A Pellegrini, R Smolinski, L Chen, X Fu, SKS Hari, J Jiang, SV Adve, ...
2012 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2012
Viper: virtual pipelines for enhanced reliability
A Pellegrini, JL Greathouse, V Bertacco
Acm Sigarch Computer Architecture News 40 (3), 344-355, 2012
Application-aware diagnosis of runtime hardware faults
A Pellegrini, V Bertacco
2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 487-492, 2010
The Arm Neoverse N1 platform: Building blocks for the next-gen cloud-to-edge infrastructure SoC
A Pellegrini, N Stephens, M Bruce, Y Ishii, J Pusdesris, A Raja, ...
IEEE Micro 40 (2), 53-62, 2020
EVA: An efficient vision architecture for mobile systems
J Clemons, A Pellegrini, S Savarese, T Austin
2013 International Conference on Compilers, Architecture and Synthesis for …, 2013
Cardio: Adaptive CMPs for reliability through dynamic introspective operation
A Pellegrini, V Bertacco
2011 IEEE International High Level Design Validation and Test Workshop, 98-105, 2011
Cobra: A comprehensive bundle-based reliable architecture
A Pellegrini, V Bertacco
2013 International Conference on Embedded Computer Systems: Architectures …, 2013
Cardio: CMP Adaptation for Reliability Through Dynamic Introspective Operation
A Pellegrini, V Bertacco
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions …, 2014
Arm Neoverse N1 Cloud-to-Edge Infrastructure SoCs
A Pellegrini, C Abernathy
2019 IEEE Hot Chips 31 Symposium (HCS), 1-21, 2019
Data processing apparatus with memory rename table for mapping memory addresses to registers
JM Pusdesris, Y Kang, A Pellegrini, BA Vandersloot, TN Mudge
US Patent 9,471,480, 2016
Adaptive Distributed Architectures for Future Semiconductor Technologies.
A Pellegrini
NOCS 2010
R Abdel-Khalek, N Agarwal, K Aisopos, A Amory, P Asimakopoulos, ...
Fault-Based Attack Fault Based Attack of RSA Authentication
A Pellegrini
FreeFood: A 1GHz High-Performance 16-bit DSP with SIMD Multimedia Extensions
G Bhatnagher, B Climans, A Pellegrini, B Xiao, D Zhang
Ann Arbor 1001, 48109, 0
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