Tengfei Jiang
Tengfei Jiang
Assistant Professor of Materials Science and Engineering, University of Central Florida
Verified email at ucf.edu
Cited by
Cited by
Oxygen-activated growth and bandgap tunability of large single-crystal bilayer graphene
Y Hao, L Wang, Y Liu, H Chen, X Wang, C Tan, S Nie, JW Suk, T Jiang, ...
Nature nanotechnology 11 (5), 426-431, 2016
Characterization of thermal stresses in through-silicon vias for three-dimensional interconnects by bending beam technique
SK Ryu, T Jiang, KH Lu, J Im, HY Son, KY Byun, R Huang, PS Ho
Applied Physics Letters 100 (4), 041901, 2012
Effect of thermal stresses on carrier mobility and keep-out zone around through-silicon vias for 3-D integration
SK Ryu, KH Lu, T Jiang, JH Im, R Huang, PS Ho
IEEE Transactions on Device and Materials Reliability 12 (2), 255-262, 2012
Measurement and analysis of thermal stresses in 3D integrated structures containing through-silicon-vias
T Jiang, SK Ryu, Q Zhao, J Im, R Huang, PS Ho
Microelectronics Reliability 53 (1), 53-62, 2013
Plasticity mechanism for copper extrusion in through-silicon vias for three-dimensional interconnects
T Jiang, C Wu, L Spinella, J Im, N Tamura, M Kunz, HY Son, B Gyu Kim, ...
Applied Physics Letters 103 (21), 211906, 2013
Through-silicon via stress characteristics and reliability impact on 3D integrated circuits
T Jiang, J Im, R Huang, PS Ho
Mrs Bulletin 40 (3), 248-256, 2015
Cementing subterranean zones using cement compositions containing biodegradable dispersants
J Vijn, C Spindler, G Keilhofer, J Plank
US Patent App. 10/170,399, 2003
Effect of intermetallic formation on electromigration reliability of TSV-microbump joints in 3D interconnect
Y Wang, SH Chae, R Dunne, Y Takahashi, K Mawatari, P Steinmann, ...
2012 IEEE 62nd Electronic Components and Technology Conference, 319-325, 2012
Quantitative microstructural imaging by scanning Laue x-ray micro-and nanodiffraction
X Chen, C Dejoie, T Jiang, CS Ku, N Tamura
MRS bulletin 41 (6), 445-453, 2016
Thermomechanical failure analysis of through-silicon via interface using a shear-lag model with cohesive zone
SK Ryu, T Jiang, J Im, PS Ho, R Huang
IEEE Transactions on Device and Materials Reliability 14 (1), 318-326, 2013
Study of stresses and plasticity in through-silicon via structures for 3D interconnects by X-ray micro-beam diffraction
T Jiang, C Wu, N Tamura, M Kunz, BG Kim, HY Son, MS Suh, J Im, ...
IEEE Transactions on Device and Materials Reliability 14 (2), 698-703, 2014
Effect of scaling copper through-silicon vias on stress and reliability for 3D interconnects
L Spinella, M Park, J Im, P Ho, N Tamura, T Jiang
2016 IEEE International Interconnect Technology Conference/Advanced …, 2016
Characterization of plasticity and stresses in TSV structures in stacked dies using synchrotron X-ray microdiffraction
T Jiang, C Wu, P Su, X Liu, P Chia, L Li, HY Son, JS Oh, KY Byun, NS Kim, ...
2013 IEEE 63rd Electronic Components and Technology Conference, 641-647, 2013
Processing effect on via extrusion for TSVs in three-dimensional interconnects: A comparative study
T Jiang, L Spinella, JH Im, R Huang, PS Ho
IEEE Transactions on Device and Materials Reliability 16 (4), 465-469, 2016
Impact of grain structure and material properties on via extrusion in 3D interconnects
T Jiang, C Wu, J Im, R Huang, PS Ho
Journal of Microelectronics and Electronic Packaging 12 (3), 118-122, 2015
Second-harmonic microscopy of strain fields around through-silicon-vias
Y Cho, F Shafiei, BS Mendoza, M Lei, T Jiang, PS Ho, MC Downer
Applied Physics Letters 108 (15), 151602, 2016
Material characterization and failure analysis of through-silicon vias
C Wu, T Jiang, J Im, KM Liechti, R Huang, PS Ho
Proceedings of the 21th International Symposium on the Physical and Failure …, 2014
Effect of high temperature storage on the stress and reliability of 3D stacked chip
T Jiang, C Wu, P Su, P Chia, L Li, HY Son, MS Suh, NS Kim, J Im, ...
2014 IEEE 64th Electronic Components and Technology Conference (ECTC), 1122-1127, 2014
Impact of material and microstructure on thermal stresses and reliability of through-silicon via (TSV) structures
T Jiang, SK Ryu, J Im, HY Son, NS Kim, R Huang, PS Ho
2013 IEEE International Interconnect Technology Conference-IITC, 1-3, 2013
The effective control of Cu through-silicon via extrusion for three-dimensional integrated circuits by a metallic cap layer
G Jalilvand, O Ahmed, L Spinella, L Zhou, T Jiang
Scripta Materialia 164, 101-104, 2019
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