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Shih-Chieh Chang
Shih-Chieh Chang
Computer Science, Natioanl Tsing-Hua University
Verified email at cs.nthu.edu.tw - Homepage
Title
Cited by
Cited by
Year
Perturb and simplify: Multilevel boolean network optimizer
SC Chang, M Marek-Sadowska, KT Cheng
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1996
1821996
Optimization of pattern matching circuits for regular expression on FPGA
CH Lin, CT Huang, CP Jiang, SC Chang
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 15 (12 …, 2007
1552007
Technology mapping for TLU FPGAs based on decomposition of binary decision diagrams
SC Chang, M Marek-Sadowdka, TT Hwang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1996
1461996
Logic synthesis for engineering change
CC Lin, KC Chen, SC Chang, M Marek-Sadowska, KT Cheng
Proceedings of the 32nd Annual ACM/IEEE Design Automation Conference, 647-652, 1995
1381995
Monas: Multi-objective neural architecture search using reinforcement learning
CH Hsu, SH Chang, JH Liang, HP Chou, CH Liu, SC Chang, JY Pan, ...
arXiv preprint arXiv:1806.10332, 2018
1342018
Accelerating pattern matching using a novel parallel algorithm on GPUs
CH Lin, CH Liu, LS Chien, SC Chang
IEEE Transactions on Computers 62 (10), 1906-1916, 2012
1162012
Accelerating string matching using multi-threaded algorithm on GPU
CH Lin, SY Tsai, CH Liu, SC Chang, JM Shyu
2010 IEEE Global Telecommunications Conference GLOBECOM 2010, 1-5, 2010
1032010
Circuit optimization by rewiring
SC Chang, LPPP Van Ginneken, M Marek-Sadowska
IEEE Transactions on computers 48 (9), 962-970, 1999
921999
Optimization of regular expression pattern matching circuits on FPGA
CH Lin, CT Huang, CP Jiang, SC Chang
Design, Automation and Test in Europe, 2006
872006
A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips
International Solid-State Circuits Conference ISSCC, 240-242, 2020
85*2020
Timing driven power gating
DS Chiou, SH Chen, SC Chang, C Yeh
2006 43rd ACM/IEEE Design Automation Conference, 121-124, 2006
692006
Postlayout logic restructuring using alternative wires
SC Chang, KT Cheng, NS Woo, M Marek-Sadowska
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1997
691997
Fast boolean optimization by rewiring
SC Chang, LPPP van Ginneken, M Marek-Sadowska
Proceedings of International Conference on Computer Aided Design, 262-269, 1996
681996
Layout driven logic synthesis for FPGAs
SC Chang, KT Cheng, NS Woo, M Marek-Sadowska
Design Automation Conference 4 (g5), o1, 1994
671994
Remix: rebalanced mixup
HP Chou, SC Chang, JY Pan, W Wei, DC Juan
European Conference on Computer Vision, 95-110, 2020
662020
A fuzzy-matching model with grid reduction for lithography hotspot detection
WY Wen, JC Li, SY Lin, JY Chen, SC Chang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014
642014
Performance optimization using variable-latency design style
YS Su, DC Wang, SC Chang, M Marek-Sadowska
IEEE transactions on very large scale integration (VLSI) systems 19 (10 …, 2010
582010
A novel fuzzy matching model for lithography hotspot detection
SY Lin, JY Chen, JC Li, WY Wen, SC Chang
2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2013
562013
Technology mapping via transformations of function graphs
SC Chang, M Marek-Sadowska
Proceedings 1992 IEEE International Conference on Computer Design: VLSI in …, 1992
491992
Minimizing ROBDD size of incompletely specified multiple output functions
SC Chang, D kin Cheng, M Marek-Sadowska
European Design and Test Conference, 1994
481994
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