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Rene Krenz-Bååth
Rene Krenz-Bååth
Hochschule Hamm-Lippstadt
Verified email at hshl.de - Homepage
Title
Cited by
Cited by
Year
Defect-oriented cell-aware ATPG and fault simulation for industrial cell libraries and designs
F Hapke, R Krenz-Baath, A Glowatz, J Schlöffel, H Hashempour, ...
2009 International Test Conference, 1-10, 2009
1022009
Defect-oriented cell-internal testing
F Hapke, W Redemund, J Schloeffel, R Krenz-Baath, A Glowatz, M Wittke, ...
2010 IEEE International Test Conference, 1-10, 2010
612010
A suite of IEEE 1687 benchmark networks
A Tšertov, A Jutman, S Devadze, MS Reorda, E Larsson, FG Zadegan, ...
2016 IEEE International Test Conference (ITC), 1-10, 2016
422016
Design, verification, and application of IEEE 1687
FG Zadegan, E Larsson, A Jutman, S Devadze, R Krenz-Baath
2014 IEEE 23rd Asian Test Symposium, 93-100, 2014
292014
A new SAT-based ATPG for generating highly compacted test sets
S Eggersglüß, R Krenz-Bååth, A Glowatz, F Hapke, R Drechsler
2012 IEEE 15th International Symposium on Design and Diagnostics of …, 2012
252012
Access time minimization in IEEE 1687 networks
R Krenz-Baath, FG Zadegan, E Larsson
2015 IEEE International Test Conference (ITC), 1-10, 2015
242015
Optimization-based multiple target test generation for highly compacted test sets
S Eggersglüb, K Schmitz, R Krenz-Bååth, R Drechsler
2014 19th IEEE European Test Symposium (ETS), 1-6, 2014
212014
Cell-Aware Fault Model Creation And Pattern Generation
F Hapke, R Krenz-Baath, A Glowatz, J Schloeffel, P Weseloh, M Wittke, ...
US Patent App. 12/718,799, 2010
192010
On optimization-based ATPG and its application for highly compacted test sets
S Eggersglüß, K Schmitz, R Krenz-Bååth, R Drechsler
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016
182016
Computing optimal communication schedules for time-triggered networks using an SMT solver
C Schöler, R Krenz-Bååth, A Murshed, R Obermaisser
2016 11th IEEE Symposium on Industrial Embedded Systems (SIES), 1-9, 2016
172016
Industrial application of IEEE P1687 for an automotive product
M Keim, T Waayers, R Morren, F Hapke, R Krenz-Baath
2013 Euromicro Conference on Digital System Design, 453-461, 2013
172013
Improved Boolean function hashing based on multiple-vertex dominators
R Krenz, E Dubrova
Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation …, 2005
172005
Design and analysis of a self-timed duplex communication system
A Yakovlev, S Furber, R Krenz, A Bystrov
IEEE Transactions on Computers 53 (7), 798-814, 2004
162004
Fast algorithm for computing spectral transforms of Boolean and multiple-valued functions on circuit representation
R Krenz, E Dubrova, A Kuehlmann
33rd International Symposium on Multiple-Valued Logic, 2003. Proceedings …, 2003
122003
Multi-targeting boolean satisfiability-based test pattern generation
R Krenz-Baath, A Glowatz, F Hapke
US Patent 8,689,069, 2014
112014
Optimal SAT-based scheduler for time-triggered networks-on-a-chip
C Schöler, R Krenz-Bååth, A Murshed, R Obermaisser
10th IEEE International Symposium on Industrial Embedded Systems (SIES), 1-6, 2015
92015
Improving CNF representations in SAT-based ATPG for industrial circuits using BDDs
D Tille, S Eggersglüß, R Krenz-Bååth, J Schloeffel, R Drechsler
2010 15th IEEE European Test Symposium, 176-181, 2010
82010
Circuit-Based Evaluation of the Arithmetic Transform of Boolean Functions.
R Krenz, E Dubrova, A Kuehlmann
IWLS, 321-326, 2002
72002
Improved Circuit-to-CNF Transformation for SAT-based ATPG
D Tille, R Krenz-Baath, J Schloeffel, R Drechsler
ETS’08 (s.[32]), 2008
52008
A Novel Formal Verification Framework for Future MPSoC Architectures
C Schöler, R Krenz-Baath, R Obermaisser
Proc. on Manufacturable and Dependable Multicore Architectures at Nanoscale …, 2015
42015
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