| SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput R Ben-Hur, R Ronen, A Haj-Ali, D Bhattacharjee, A Eliahu, N Peled, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2019 | 98 | 2019 |
| SIMPLE MAGIC: Synthesis and In-memory MaPping of Logic Execution for Memristor-Aided loGIC R Ben-Hur, N Wald, N Talati, S Kvatinsky | 93* | |
| Memristive logic: A framework for evaluation and comparison J Reuben, R Ben-Hur, N Wald, N Talati, AH Ali, PE Gaillardon, ... 2017 27th International Symposium on Power and Timing Modeling, Optimization …, 2017 | 87 | 2017 |
| Efficient algorithms for in-memory fixed point multiplication using magic A Haj-Ali, R Ben-Hur, N Wald, S Kvatinsky 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018 | 83 | 2018 |
| IMAGING-In-Memory AlGorithms for Image processiNG A Haj-Ali, R Ben-Hur, N Wald, R Ronen, S Kvatinsky IEEE Transactions on Circuits and Systems I: Regular Papers, 1-14, 2018 | 66 | 2018 |
| Memory Processing Unit for in-memory processing R Ben-Hur, S Kvatinsky Nanoscale Architectures (NANOARCH), 2016 IEEE/ACM International Symposium on …, 2016 | 53* | 2016 |
| Memristive memory processing unit (MPU) controller for in-memory processing R Ben-Hur, S Kvatinsky Science of Electrical Engineering (ICSEE), IEEE International Conference on …, 2016 | 52* | 2016 |
| mMPU—A Real Processing-in-Memory Architecture to Combat the von Neumann Bottleneck N Talati, R Ben-Hur, N Wald, A Haj-Ali, J Reuben, S Kvatinsky Applications of Emerging Memory Technology, 191-213, 2020 | 51 | 2020 |
| Not in Name Alone: A Memristive Memory Processing Unit for Real In-Memory Processing A Haj-Ali, R Ben-Hur, N Wald, R Ronen, S Kvatinsky IEEE Micro 38 (5), 13-21, 2018 | 43 | 2018 |
| Practical Challenges in Delivering the Promises of Real Processing-in-Memory Machines N Talati, A Haj Ali, R Ben-Hur, N Wald, R Ronen, PE Gaillardon, ... DATE 2018, 0 | 34* | |
| FiltPIM: In-Memory Filter for DNA Sequencing M Khalifa, R Ben-Hur, R Ronen, O Leitersdorf, L Yavits, S Kvatinsky 2021 28th IEEE International Conference on Electronics, Circuits, and …, 2021 | 15 | 2021 |
| A taxonomy and evaluation framework for memristive logic J Reuben, N Talati, N Wald, R Ben-Hur, AH Ali, PE Gaillardon, ... Handbook of Memristor Networks, 1065-1099, 2019 | 11 | 2019 |
| X-MAGIC: Enhancing PIM Using Input Overwriting Capabilities N Peled, R Ben-Hur, R Ronen, S Kvatinsky 2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration …, 2020 | 8 | 2020 |
| abstractPIM: Bridging the Gap Between Processing-In-Memory Technology and Instruction Set Architecture A Eliahu, R Ben-Hur, R Ronen, S Kvatinsky 2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration …, 2020 | 8 | 2020 |
| Algorithmic Considerations in Memristive Memory Processing Units (MPU) R Ben-Hur, N Talati, S Kvatinsky CNNA 2016; 15th International Workshop on Cellular Nanoscale Networks and …, 2016 | 7 | 2016 |
| mMPU: Building a Memristor-Based General-Purpose In-Memory Computation Architecture A Eliahu, R Ben-Hur, A Haj-Ali, S Kvatinsky, L Andrade, F Rousseau Multi-Processor System-on-Chip 1 Architectures 6, 119-132, 2021 | 5 | 2021 |
| Memristor-based in-memory logic and its application in image processing A Haj-Ali, R Ronen, R Ben-Hur, N Wald, S Kvatinsky Memristive Devices for Brain-Inspired Computing, 175-194, 2020 | 1 | 2020 |
| abstractPIM: A Technology Backward-Compatible Compilation Flow for Processing-In-Memory A Eliahu, R Ben-Hur, R Ronen, S Kvatinsky VLSI-SoC: Design Trends: 28th IFIP WG 10.5/IEEE International Conference on …, 2021 | | 2021 |
| Processing within a Memristive Memory R Ben-Hur, S Kvatinsky | | 2016 |
| Synthesis and In-memory MaPping of Logic Execution for Memristor-Aided loGIC R Ben-Hur, R Ronen, S Kvatinsky | | |
