| Diamond MOSFET: An innovative layout to improve performance of ICs SP Gimenez Solid-State Electronics 54 (12), 1690-1696, 2010 | 80 | 2010 |
| Microcontrolador 8051 SP Gimenez Editora Érica 1, 340, 2010 | 54* | 2010 |
| Layout Techniques in MOSFETs SP Gimenez Springer Nature, 2022 | 43 | 2022 |
| An Innovative Ellipsoidal Layout Style to Further Boost the Electrical Performance of MOSFETs CRS Salvador P. Gimenez, Marcello M. Correia, Enrico D. Neto IEEE Transactions on Electron Devices Letters 36 (7), 705-707, 2015 | 41* | 2015 |
| Compact diamond MOSFET model accounting for PAMDLE applicable down 150 nm node SP Gimenez, E Davini, VV Peruzzi, C Renaux, D Flandre Electronics Letters 50 (22), 1618-1620, 2014 | 36 | 2014 |
| Modeling and characterization of overlapping circular-gate MOSFET and its application to power devices JA De Lima, SP Gimenez, KH Cirne IEEE transactions on power electronics 27 (3), 1622-1631, 2011 | 30 | 2011 |
| Diamond layout style impact on SOI MOSFET in high temperature environment SP Gimenez, EHS Galembeck, C Renaux, D Flandre Microelectronics Reliability 55 (5), 783-788, 2015 | 29 | 2015 |
| Using diamond layout style to boost MOSFET frequency response of analogue IC SP Gimenez, RD Leoni, C Renaux, D Flandre Electronics Letters 5 (February), 398 – 400, 2014 | 29 | 2014 |
| Gaussian fitness functions for optimizing analog CMOS integrated circuits RA de Lima Moreto, CE Thomaz, SP Gimenez IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 28 | 2017 |
| FISH SOI MOSFET: Modeling, characterization and its application to improve the performance of analog ICs SP Gimenez, DM Alati, E Simoen, C Claeys Journal of the Electrochemical Society 158 (12), H1258, 2011 | 28 | 2011 |
| Boosting the total ionizing dose tolerance of digital switches by using OCTO SOI MOSFET LN de Souza Fino, ED Neto, MAG da Silveira, C Renaux, D Flandre, ... Semiconductor Science and Technology 30 (10), 105024, 2015 | 27 | 2015 |
| The wave SOI MOSFET: A new accuracy transistor layout to improve drain current and reduce die area for current drivers applications SP Gimenez ECS Transactions 19 (4), 153, 2009 | 27 | 2009 |
| Improving the protons radiation robustness of integrated circuits by using the diamond layout style in radiation and its effects on components and systems SP Gimenez RADECS 21, 527-534, 2012 | 26 | 2012 |
| OCTO SOl MOSFET: An evolution of the diamond to be used in the analog integrated circuits SP Gimenez, DM Alati EUROSOI 2011-VII Workshop of the Thematic Network on Silicon on Insulator …, 2011 | 22 | 2011 |
| A novel overlapping circular-gate transistor (O-CGT) and its application to analog design JA De Lima, SP Gimenez 2009 Argentine School of Micro-Nanoelectronics, Technology and Applications …, 2009 | 20 | 2009 |
| Gain improvement in operational transconductance amplifiers using Graded-Channel SOI nMOSFETS SP Gimenez, MA Pavanello, JA Martino, D Flandre Microelectronics journal 37 (1), 31-37, 2006 | 19 | 2006 |
| Improving the X-ray radiation tolerance of the analog ICs by using OCTO layout style LN de Souza Fino, MAG da Silveira, C Renaux, D Flandre, SP Gimenez 28th Symposium on Microelectronics Technology and Devices (SBMicro 2013), 1-4, 2013 | 18 | 2013 |
| Performance of electronic devices submitted to X-rays and high energy proton beams MAG Silveira, KH Cirne, RBB Santos, SP Gimenez, NH Medina, N Added, ... Nuclear Instruments and Methods in Physics Research Section B: Beam …, 2012 | 17 | 2012 |
| Early voltage behavior in circular gate SOI nMOSFET using 0.13 μm partially-depleted SOI CMOS Technology SP Gimenez, RM Ferreira, JA Martino ECS Transactions 4 (1), 309, 2007 | 17 | 2007 |
| Experimental comparative study between the diamond MOSFET and its conventional counterpart in high temperatures environment EHS Galembeck, C Renaux, D Flandre, SP Gimenez 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference …, 2013 | 16 | 2013 |
Denis FlandreICTEAM, EPL, Université catholique de Louvain (UCL)Verified email at uclouvain.be
