| An Optimal Digital Beamformer for mm-Wave Phased Arrays with 660MHz Instantaneous Bandwidth in 28nm CMOS D Peña-Colaiocco, CH Huang, KD Chu, JC Rudell, V Sathe 2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 1-3, 2022 | 8 | 2022 |
| UniCaP-2: Phase-Locked Adaptive Clocking with Rapid Clock Cycle Recovery in 65nm CMOS X Sun, A Boora, R Pamula, CH Huang, D Peña-Colaiocco, VS Sathe 2020 IEEE Symposium on VLSI Circuits, 1-2, 2020 | 6 | 2020 |
| A Reconfigurable Digital Beamforming V-Band Phased-Array Receiver D Dosluoglu, KD Chu, D Pena-Colaiocco, I Zhao, V Sathe, JC Rudell ESSCIRC 2022-IEEE 48th European Solid State Circuits Conference (ESSCIRC …, 2022 | 3 | 2022 |
| A 46-channel Vector Stimulator with 50mV Worst-Case Common-Mode Artifact for Low-Latency Adaptive Closed-Loop Neuromodulation A Mandal, D Peña, R Pamula, K Khateeb, L Murphy, ... 2021 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2021 | 2 | 2021 |
| Model Predictive Control of an Integrated Buck Converter for Digital SoC Domains in 65nm CMOS X Sun, A Boora, R Pamula, CH Huang, D Peña-Colaiocco, VS Sathe 2020 IEEE Symposium on VLSI Circuits, 1-2, 2020 | 2 | 2020 |
| Energy Minimization of Duty-Cycled Systems Through Optimal Stored-Energy Recycling from Idle Domains CH Huang, A Mandal, D Peña-Colaiocco, EP Da Silva, V Sathe 2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 222-224, 2022 | 1 | 2022 |
| Regenerative Breaking: Optimal Energy Recycling for Energy Minimization in Duty-Cycled Domains CH Huang, A Mandal, D Peña-Colaiocco, EP Da Silva, VS Sathe IEEE Journal of Solid-State Circuits 58 (1), 68-77, 2022 | | 2022 |
| Implementation in a FPGA of a configurable emulator of the LHCb Upgrade front end electronics DL Pena Colaiocco | | 2016 |
