| A 14 nm SoC platform technology featuring 2nd generation Tri-Gate transistors, 70 nm gate pitch, 52 nm metal pitch, and 0.0499 um2 SRAM cells, optimized for … CH Jan, F Al-Amoody, HY Chang, T Chang, YW Chen, N Dias, W Hafez, ... 2015 Symposium on VLSI Technology (VLSI Technology), T12-T13, 2015 | 103 | 2015 |
| Fin-based thin film resistor CH Jan, WM Hafez, NL Dias, R Ramaswamy, HY Chang, RW Olac-Vaw, ... US Patent 10,930,729, 2021 | 60 | 2021 |
| Transistor reliability characterization and comparisons for a 14 nm tri-gate technology optimized for System-on-Chip and foundry platforms C Prasad, KW Park, M Chahal, I Meric, SR Novak, S Ramey, P Bai, ... 2016 IEEE International Reliability Physics Symposium (IRPS), 4B-5-1-4B-5-8, 2016 | 27 | 2016 |
| THz hot-electron micro-bolometer based on low-mobility 2-DEG in GaN heterostructure JK Choi, V Mitin, R Ramaswamy, VA Pogrebnyak, MP Pakmehr, ... IEEE Sensors Journal 13 (1), 80-88, 2012 | 19 | 2012 |
| Intel 4 CMOS technology featuring advanced FinFET transistors optimized for high density and high-performance computing B Sell, S An, J Armstrong, D Bahr, B Bains, R Bambery, K Bang, D Basu, ... 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 18 | 2022 |
| Transistor gate metal with laterally graduated work function CH Jan, W Hafez, HY Chang, OVAW Roman, T Chang, R Ramaswamy, ... US Patent 10,192,969, 2019 | 17 | 2019 |
| Low leakage non-planar access transistor for embedded dynamic random access memory (eDRAM) J Park, G Bhimarasetti, R Ramaswamy, CH Jan, WM Hafez, JYD Yeh, ... US Patent 9,741,721, 2017 | 11 | 2017 |
| Gate-all-around integrated circuit structures having dual nanoribbon channel structures T Trivedi, R Ramaswamy, JD Kim, B Fallahazad, HY Chang, T Chang, ... US Patent 11,437,483, 2022 | 8 | 2022 |
| Multi-gate transistor with variably sized fin N Nidhi, CH Jan, RW Olac-Vaw, HY Chang, NL Dias, WM Hafez, ... US Patent 9,947,585, 2018 | 7 | 2018 |
| Integration of iii-n transistors and polysilicon resistors M Radosavljevic, HW Then, S Dasgupta, PB Fischer, N Nidhi, ... US Patent App. 16/249,256, 2020 | 6 | 2020 |
| 2DEG GaN hot electron microbolometers and quantum cascade lasers for THz heterodyne sensing R Ramaswamy, K Wang, A Stier, A Muraviev, G Strasser, A Markelz, ... Micro-and Nanotechnology Sensors, Systems, and Applications III 8031, 145-159, 2011 | 6 | 2011 |
| III-N tunnel device architectures and high frequency mixers employing a III-N tunnel device R Ramaswamy, WM Hafez, M Radosavljevic, S Dasgupta, HW Then, ... US Patent 11,387,328, 2022 | 5 | 2022 |
| Nanoribbon thick gate devices with differential ribbon spacing and width for soc applications T Trivedi, R Ramaswamy, JD Kim, T Chang, WM Hafez, B Fallahazad, ... US Patent App. 16/713,684, 2021 | 5 | 2021 |
| Maskless process for fabricating gate structures and schottky diodes R Ramaswamy, N Nidhi, WM Hafez, JC Rode, P Fischer, HW Then, ... US Patent App. 16/239,059, 2020 | 5 | 2020 |
| E-Core Implementation in Intel 4 with PowerVia (Backside Power) Technology M Shamanna, E Abuayob, G Aenuganti, C Alvares, J Antony, ... 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2023 | 4 | 2023 |
| Integration of Si-based transistors with non-Si technologies by semiconductor regrowth over an insulator material N Nidhi, HW Then, M Radosavljevic, S Dasgupta, PB Fischer, ... US Patent App. 16/390,478, 2020 | 4 | 2020 |
| Microwave heterodyne receiver based on AlGaAs/GaAs 2DEG bolometer K Wang, R Ramaswamy, M Bell, A Sergeev, G Strasser, A Verevkin, ... 35th International Conference on Infrared, Millimeter, and Terahertz Waves, 1-2, 2010 | 4 | 2010 |
| Intel PowerVia technology: Backside power delivery for high density and high-performance computing W Hafez, P Agnihotri, M Asoro, M Aykol, B Bains, R Bambery, M Bapna, ... 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2023 | 3 | 2023 |
| Planar transistors with wrap-around gates and wrap-around source and drain contacts N Nidhi, R Ramaswamy, HW Then, M Radosavljevic, S Dasgupta, ... US Patent 11,588,037, 2023 | 3 | 2023 |
| Gate-all-around integrated circuit structures having depopulated channel structures T Trivedi, JD Kim, WM Hafez, HY Chang, R Ramaswamy, T Chang, ... US Patent 11,094,782, 2021 | 3 | 2021 |
