Interconnect design for subthreshold circuits SD Pable, M Hasan IEEE Transactions on Nanotechnology 11 (3), 633-639, 2012 | 31 | 2012 |
“Ultralow-Power Signaling Challenges for Subthreshold Global Interconnects,” SDPM Hasan INTEGRATION, the VLSI Journal 42, 186-196, 2012 | 27* | 2012 |
Ultra-low-power signaling challenges for subthreshold global interconnects SD Pable, M Hasan Integration 45 (2), 186-196, 2012 | 27 | 2012 |
High Speed Interconnect Through Device Optimization for Subthreshold FPGA, SDPM Hasan Microelectronics Journal 42 (3), 545–552, 2011 | 21 | 2011 |
“Design and analysis of robust dual threshold CMOS full adder circuit in 32nm technology,” M.W Akram, Aminul Islam, S. D. Pable, Mohd. Hasan International conference on Advances in Recent Technologies in Communication …, 2010 | 15 | 2010 |
“Interconnect Parameters Optimization to Enhance the Performance of Subthreshold Circuits,” ARMA S. D. Pable, Mohd. Hasan, S.A.Abbasi Microelectronics Journal 44 (5), 454–461, 2013 | 13 | 2013 |
Design of low power current starved VCO with improved frequency stability RR Jagtap, SD Pable International Conference on Recent Advances and Innovations in Engineering …, 2014 | 9 | 2014 |
Performance analysis of CNFET based interconnect drivers for sub-threshold circuits SS Chopade, SD Pable, DV Padole International Journal of Computer Applications 60 (4), 2012 | 9 | 2012 |
Fault detection and autoline distribution system with Gsm module NS Sonwane, SD Pable International Research Journal of Engineering and Technology (IRJET) 3 (05 …, 2016 | 7 | 2016 |
Performance optimization of CNFET based subthreshold circuits SD Pable, A Imran, M Hasan 2010 Annual IEEE India Conference (INDICON), 1-4, 2010 | 7 | 2010 |
Improved palmprint identification system H Salave, S Pable International journal of scientific & technology research 43, 180-185, 2015 | 6 | 2015 |
Ultra low power DG FinFET based voltage controlled oscillator circuits RA Walunj, SD Pable, GK Kharate International Journal of Electronics 106 (1), 134-159, 2019 | 5 | 2019 |
Design of robust ultra-low power CMOS voltage controlled ring oscillator with enhanced performance RA WaIunj, SD Pable, GK Kharate 2018 International Conference On Advances in Communication and Computing …, 2018 | 5 | 2018 |
Design of high speed sub threshold interconnects using MCML technique A Thorat, RS Khule, SD Pable IJESRT, 2016 | 5 | 2016 |
“A Novel Robust Routing Switch Box Design for Ultralow Power Applications,” SDPM Hasan International Journal of Electronics 99 (1), pp. 15-27, 2012 | 5* | 2012 |
Optimized design of hybrid CMOS and CNFET 32 nm dual-X current conveyor A Imran, SD Pable, A Islam, M Hasan 2011 International Conference on Multimedia, Signal Processing and …, 2011 | 5 | 2011 |
“Performance Analysis of Ultra Low-Power Mixed CNT Interconnects for Scaled Technology,” S. D. Pable, Ajmal Kafeel, and Mohd. Hasan IEEE International Symposium on Electronics System Design (ISED), Kochi …, 2011 | 5* | 2011 |
Design issues & challenges with EMI/EMC in system on packages (SOPs) R Rehpade, SD Pable, GK Kharate 2017 International conference of Electronics, Communication and Aerospace …, 2017 | 4 | 2017 |
Reconfigurable Memristor and CNFET based Four Quadrant Multiplier for Low Power Applications MA Kafeel, M Zulqarnain, M Hasan International Journal of Computer Applications 173 (6), 14-20, 2017 | 4 | 2017 |
Crosstalk Delay Analysis in Very Deep Submicron VLSI Circuits P Patil, SD Pable IRJET 3 (5), 1695-1698, 2016 | 4 | 2016 |