| A 1GS/s low-power low-kickback noise comparator in CMOS process A Baradaranrezaeii, R Abdollahi, K Hadidi, A Khoei 2011 20th European Conference on Circuit Theory and Design (ECCTD), 106-109, 2011 | 20 | 2011 |
| A simple and reliable system to detect and correct setup/hold time violations in digital circuits R Abdollahi, K Hadidi, A Khoei IEEE Transactions on Circuits and Systems I: Regular Papers 63 (10), 1682-1689, 2016 | 11 | 2016 |
| A fast-locking low-jitter digitally-enhanced DLL dynamically controlled for loop-gain and stability S Kazeminia, R Abdollahi, A Hejazi Analog Integrated Circuits and Signal Processing 94, 507-517, 2018 | 10 | 2018 |
| A digitally assisted 20MHz–600MHz 16-phase DLL enhanced with dynamic gain control loop A Hejazi, S Kazeminia, R Abdollahi 2015 European Conference on Circuit Theory and Design (ECCTD), 1-4, 2015 | 5 | 2015 |
| Programmable incrementing/decrementing binary accumulator for high-speed calibration loops A Soltani, R Abdollahi, S Kazeminia 2016 IEEE International Conference on Electronics, Circuits and Systems …, 2016 | | 2016 |
| An 8-bit 2.5 GS/s D/A converter in 0.35 µ CMOS technology with improved pipeline structure S Kazeminia, R Abdollahi, K Hadidi, A Khoei 2010 18th Iranian Conference on Electrical Engineering, 426-431, 2010 | | 2010 |
