| Emerging memory technologies for neuromorphic computing CH Kim, S Lim, SY Woo, WM Kang, YT Seo, ST Lee, S Lee, D Kwon, S Oh, ... Nanotechnology 30 (3), 032001, 2018 | 85 | 2018 |
| Adaptive learning rule for hardware-based deep neural networks using electronic synapse devices S Lim, JH Bae, JH Eum, S Lee, CH Kim, D Kwon, BG Park, JH Lee Neural Computing and Applications 31, 8101-8116, 2019 | 80 | 2019 |
| Demonstration of Unsupervised Learning With Spike-Timing-Dependent Plasticity Using a TFT-Type NOR Flash Memory Array CH Kim, S Lee, SY Woo, WM Kang, S Lim, JH Bae, J Kim, JH Lee IEEE Transactions on Electron Devices 65 (5), 1774-1780, 2018 | 69 | 2018 |
| High-density and near-linear synaptic device based on a reconfigurable gated Schottky diode JH Bae, S Lim, BG Park, JH Lee IEEE Electron Device Letters 38 (8), 1153-1156, 2017 | 63 | 2017 |
| On-chip training spiking neural networks using approximated backpropagation with analog synaptic devices D Kwon, S Lim, JH Bae, ST Lee, H Kim, YT Seo, S Oh, J Kim, K Yeom, ... Frontiers in neuroscience 14, 423, 2020 | 49 | 2020 |
| High-density and highly-reliable binary neural networks using NAND flash memory cells as synaptic devices ST Lee, H Kim, JH Bae, H Yoo, NY Choi, D Kwon, S Lim, BG Park, JH Lee 2019 IEEE International Electron Devices Meeting (IEDM), 38.4. 1-38.4. 4, 2019 | 43 | 2019 |
| Adaptive weight quantization method for nonlinear synaptic devices D Kwon, S Lim, JH Bae, ST Lee, H Kim, CH Kim, BG Park, JH Lee IEEE Transactions on Electron Devices 66 (1), 395-401, 2018 | 39 | 2018 |
| Operation scheme of multi-layer neural networks using NAND flash memory as high-density synaptic devices ST Lee, S Lim, NY Choi, JH Bae, D Kwon, BG Park, JH Lee IEEE Journal of the Electron Devices Society 7, 1085-1093, 2019 | 35 | 2019 |
| Reconfigurable field-effect transistor as a synaptic device for XNOR binary neural network JH Bae, H Kim, D Kwon, S Lim, ST Lee, BG Park, JH Lee IEEE Electron Device Letters 40 (4), 624-627, 2019 | 35 | 2019 |
| A split-gate positive feedback device with an integrate-and-fire capability for a high-density low-power neuron circuit KB Choi, SY Woo, WM Kang, S Lee, CH Kim, JH Bae, S Lim, JH Lee Frontiers in neuroscience 12, 405095, 2018 | 34 | 2018 |
| Neuromorphic technology based on charge storage memory devices ST Lee, S Lim, N Choi, JH Bae, CH Kim, S Lee, DH Lee, T Lee, S Chung, ... 2018 IEEE Symposium on VLSI Technology, 169-170, 2018 | 26 | 2018 |
| Efficient precise weight tuning protocol considering variation of the synaptic devices and target accuracy H Kim, JH Bae, S Lim, ST Lee, YT Seo, D Kwon, BG Park, JH Lee Neurocomputing 378, 189-196, 2020 | 19 | 2020 |
| Highly reliable inference system of neural networks using gated Schottky diodes S Lim, D Kwon, JH Eum, ST Lee, JH Bae, H Kim, CH Kim, BG Park, ... IEEE Journal of the Electron Devices Society 7, 522-528, 2019 | 18 | 2019 |
| Hardware-based Neural Networks using a Gated Schottky Diode as a Synapse Device S Lim, JH Bae, JH Eum, S Lee, CH Kim, D Kwon, JH Lee Circuits and Systems (ISCAS), 2018 IEEE International Symposium on, 1-5, 2018 | 15 | 2018 |
| Investigation of low-frequency noise characteristics in gated Schottky diodes D Kwon, W Shin, JH Bae, S Lim, BG Park, JH Lee IEEE Electron Device Letters 42 (3), 442-445, 2021 | 13 | 2021 |
| Impacts of program/erase cycling on the low-frequency noise characteristics of reconfigurable gated Schottky diodes W Shin, D Kwon, JH Bae, S Lim, BG Park, JH Lee IEEE Electron Device Letters 42 (6), 863-866, 2021 | 12 | 2021 |
| Novel method enabling forward and backward propagations in NAND flash memory for on-chip learning ST Lee, G Yeom, H Yoo, HS Kim, S Lim, JH Bae, BG Park, JH Lee IEEE Transactions on Electron Devices 68 (7), 3365-3370, 2021 | 9 | 2021 |
| Review of candidate devices for neuromorphic applications JH Lee, SY Woo, ST Lee, S Lim, WM Kang, YT Seo, S Lee, D Kwon, S Oh, ... ESSDERC 2019-49th European Solid-State Device Research Conference (ESSDERC …, 2019 | 7 | 2019 |
| Synaptic device using a floating fin-body MOSFET with memory functionality for neural network SY Woo, KB Choi, S Lim, ST Lee, CH Kim, WM Kang, D Kwon, JH Bae, ... Solid-State Electronics 156, 23-27, 2019 | 6 | 2019 |
| Effect of word-line bias on linearity of multi-level conductance steps for multi-layer neural networks based on NAND flash cells ST Lee, S Lim, N Choi, JH Bae, D Kwon, HS Kim, BG Park, JH Lee Journal of Nanoscience and Nanotechnology 20 (7), 4138-4142, 2020 | 5 | 2020 |
Jong-Ho LeeDepartment of Electrical and Computer Engineering, Seoul National UniversityVerified email at snu.ac.kr
