Follow
Woo Young Choi
Woo Young Choi
Associate Professor, Department of Electrical and Computer Engineering, Seoul National University
Verified email at snu.ac.kr - Homepage
Title
Cited by
Cited by
Year
Tunneling field-effect transistors (TFETs) with subthreshold swing (SS) less than 60 mV/dec
WY Choi, BG Park, JD Lee, TJK Liu
IEEE Electron Device Letters 28 (8), 743-745, 2007
17372007
Hetero-gate-dielectric tunneling field-effect transistors
WY Choi, W Lee
IEEE transactions on electron devices 57 (9), 2317-2319, 2010
3852010
Demonstration of L-shaped tunnel field-effect transistors
SW Kim, JH Kim, TJK Liu, WY Choi, BG Park
IEEE Transactions on Electron Devices 63 (4), 1774-1778, 2016
2172016
Negative capacitance in organic/ferroelectric capacitor to implement steep switching MOS devices
J Jo, WY Choi, JD Park, JW Shim, HY Yu, C Shin
Nano letters 15 (7), 4553-4556, 2015
1762015
Design guideline of Si-based L-shaped tunneling field-effect transistors
SW Kim, WY Choi, MC Sun, HW Kim, BG Park
Japanese Journal of Applied Physics 51 (6S), 06FE09, 2012
1192012
Design optimization of gate-all-around (GAA) MOSFETs
JY Song, WY Choi, JH Park, JD Lee, BG Park
IEEE transactions on nanotechnology 5 (3), 186-191, 2006
1022006
Analytical model of single-gate silicon-on-insulator (SOI) tunneling field-effect transistors (TFETs)
MJ Lee, WY Choi
Solid-State Electronics 63 (1), 110-114, 2011
1012011
70-nm impact-ionization metal-oxide-semiconductor (I-MOS) devices integrated with tunneling field-effect transistors (TFETs)
WY Choi, JY Song, JD Lee, YJ Park, BG Park
IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest …, 2005
1002005
100-nm n-/p-channel I-MOS using a novel self-aligned structure
WY Choi, JY Song, JD Lee, YJ Park, BG Park
IEEE electron device letters 26 (4), 261-263, 2005
812005
Effects of device geometry on hetero-gate-dielectric tunneling field-effect transistors
MJ Lee, WY Choi
IEEE electron device letters 33 (10), 1459-1461, 2012
712012
Compact nano-electro-mechanical non-volatile memory (NEMory) for 3D integration
WY Choi, H Kam, D Lee, J Lai, TJK Liu
Electron Devices Meeting, 2007. IEDM 2007. IEEE International, 603-606, 2007
702007
Influence of inversion layer on tunneling field-effect transistors
W Lee, WY Choi
IEEE Electron Device Letters 32 (9), 1191-1193, 2011
622011
Demonstration of hetero-gate-dielectric tunneling field-effect transistors (HG TFETs)
WY Choi, HK Lee
Nano convergence 3 (1), 1-15, 2016
572016
Nano-electro-mechanical nonvolatile memory (NEMory) cell design and scaling
WY Choi, T Osabe, TJK Liu
IEEE Transactions on Electron Devices 55 (12), 3482-3488, 2008
572008
Work-function variation effects of tunneling field-effect transistors (TFETs)
KM Choi, WY Choi
IEEE Electron Device Letters 34 (8), 942-944, 2013
542013
Ambipolarity factor of tunneling field-effect transistors (TFETs)
JS Jang, WY Choi
JSTS: Journal of Semiconductor Technology and Science 11 (4), 272-277, 2011
532011
A novel biasing scheme for I-MOS (impact-ionization MOS) devices
WY Choi, JY Song, JD Lee, YJ Park, BG Park
Nanotechnology, IEEE Transactions on 4 (3), 322-325, 2005
522005
Editorial
HY Cha, J Kim, SM Yoon, H Kim, WY Choi
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE 15 (1), 154-155, 2015
51*2015
Electrical characteristics of FinFET with vertically nonuniform source/drain doping profile
DS Woo, JH Lee, WY Choi, BY Choi, YJ Choi, JD Lee, BG Park
IEEE transactions on nanotechnology 1 (4), 233-237, 2002
422002
Dual-dielectric-constant spacer hetero-gate-dielectric tunneling field-effect transistors
G Lee, JS Jang, WY Choi
Semiconductor Science and Technology 28 (5), 052001, 2013
392013
The system can't perform the operation now. Try again later.
Articles 1–20