| A survey of the practice of computational science P Prabhu, TB Jablin, A Raman, Y Zhang, J Huang, H Kim, NP Johnson, ... State of the Practice Reports, 19, 2011 | 137 | 2011 |
| Vertically stacked silicon nanowire transistors fabricated by inductive plasma etching and stress-limited oxidation RMY Ng, T Wang, F Liu, X Zuo, J He, M Chan Electron Device Letters, IEEE 30 (5), 520-522, 2009 | 128 | 2009 |
| Dynamically managed data for CPU-GPU architectures TB Jablin, JA Jablin, P Prabhu, F Liu, DI August Proceedings of the Tenth International Symposium on Code Generation and …, 2012 | 117 | 2012 |
| A charge-based model for long-channel cylindrical surrounding-gate MOSFETs from intrinsic channel to heavily doped body F Liu, J He, L Zhang, J Zhang, J Hu, C Ma, M Chan Electron Devices, IEEE Transactions on 55 (8), 2187-2194, 2008 | 98 | 2008 |
| Dynamic synthesis for relaxed memory models F Liu, N Nedev, N Prisadnikov, M Vechev, E Yahav Proceedings of the 33rd ACM SIGPLAN conference on Programming Language …, 2012 | 92 | 2012 |
| A non-charge-sheet analytic model for symmetric double-gate MOSFETs with smooth transition between partially and fully depleted operation modes F Liu, J He, J Zhang, Y Chen, M Chan Electron Devices, IEEE Transactions on 55 (12), 3494-3502, 2008 | 47 | 2008 |
| Scalable speculative parallelization on commodity clusters H Kim, A Raman, F Liu, JW Lee, DI August Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on …, 2010 | 46 | 2010 |
| Generic Carrier-Based Core Model for Four-Terminal Double-Gate MOSFET Valid for Symmetric, Asymmetric, SOI, and Independent Gate Operation Modes F Liu, J He, Y Fu, J Hu, W Bian, Y Song, X Zhang, M Chan IEEE transactions on electron devices, 271-276, 2008 | 45* | 2008 |
| DynaSpAM: Dynamic spatial architecture mapping using Out of Order instruction schedules F Liu, H Ahn, SR Beard, T Oh, DI August Computer Architecture (ISCA), 2015 ACM/IEEE 42nd Annual International …, 2015 | 43 | 2015 |
| A carrier-based approach for compact modeling of the long-channel undoped symmetric double-gate MOSFETs J He, F Liu, J Zhang, J Feng, J Hu, S Yang, M Chan Electron Devices, IEEE Transactions on 54 (5), 1203-1209, 2007 | 43 | 2007 |
| Cgpa: coarse-grained pipelined accelerators F Liu, S Ghosh, NP Johnson, DI August Design Automation Conference (DAC), 2014 51st ACM/EDAC/IEEE, 1-6, 2014 | 35 | 2014 |
| A compact model of silicon-based nanowire MOSFETs for circuit simulation and design J Yang, J He, F Liu, L Zhang, F Liu, X Zhang, M Chan Electron Devices, IEEE Transactions on 55 (11), 2898-2906, 2008 | 35 | 2008 |
| An approximate carrier-based compact model for fully depleted surrounding-gate MOSFETs with a finite doping body J He, F Liu, W Bian, J Feng, J Zhang, X Zhang Semiconductor science and technology 22 (6), 671, 2007 | 33 | 2007 |
| Effects of body doping on threshold voltage and channel potential of symmetric DG MOSFETs with continuous solution from accumulation to strong-inversion regions F Liu, L Zhang, J Zhang, J He, M Chan Semiconductor Science and Technology 24, 085005, 2009 | 28 | 2009 |
| A charge-based compact model for predicting the current–voltage and capacitance–voltage characteristics of heavily doped cylindrical surrounding-gate MOSFETs F Liu, J Zhang, F He, F Liu, L Zhang, M Chan Solid-State Electronics 53 (1), 49-53, 2009 | 27 | 2009 |
| An Analytic Model for Nanowire MOSFETs With Ge/Si Core/Shell Structure L Zhang, J He, J Zhang, F Liu, Y Fu, Y Song, X Zhang Electron Devices, IEEE Transactions on 55 (11), 2907-2917, 2008 | 20 | 2008 |
| Parallel assertions for debugging parallel programs D Schwartz-Narbonne, F Liu, T Pondicherry, D August, S Malik Formal Methods and Models for Codesign (MEMOCODE), 2011 9th IEEE/ACM …, 2011 | 14 | 2011 |
| A unified charge-based model for symmetric DG MOSFETs valid for both heavily doped body and undoped channel L Zhang, J He, F Liu, J Zhang, Y Song Mixed Design of Integrated Circuits and Systems, 2008. MIXDES 2008. 15th …, 2008 | 12 | 2008 |
| GPU Accelerated Array Queries: The Good, the Bad, and the Promising F Liu, K Lee, I Roy, V Talwar, S Chen, J Chang, P Ranganathan | 9 | 2014 |
| A Surface-Potential-Based Non-Charge-Sheet Core Model for SOI MOSFETs Valid to PD and FD Operation Modes J Zhang, J He, F Liu, C Ma, J Feng, M Chan The 5th International Workshop on Compact Modeling (IWCM'08), Seoul, South Korea, 2008 | 6 | 2008 |
Mansun ChanChair Professor, HKUSTVerified email at ust.hk
