Advait Madhavan
Advait Madhavan
Assistant Research Scientist, University of Maryland, National Institute of Standards and Technology
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Roadmap on emerging hardware and technology for machine learning
K Berggren, Q Xia, KK Likharev, DB Strukov, H Jiang, T Mikolajick, ...
Nanotechnology 32 (1), 012002, 2020
Race logic: A hardware acceleration for dynamic programming algorithms
A Madhavan, T Sherwood, D Strukov
ACM SIGARCH Computer Architecture News 42 (3), 517-528, 2014
A multiply-add engine with monolithically integrated 3D memristor crossbar/CMOS hybrid circuit
B Chakrabarti, MA Lastras-Montaño, G Adam, M Prezioso, B Hoskins, ...
Scientific reports 7 (1), 1-10, 2017
Energy-efficient stochastic computing with superparamagnetic tunnel junctions
MW Daniels, A Madhavan, P Talatchian, A Mizrahi, MD Stiles
Physical review applied 13 (3), 034016, 2020
A computational temporal logic for superconducting accelerators
G Tzimpragos, D Vasudevan, N Tsiskaridze, G Michelogiannakis, ...
Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020
A 4-mm2 180-nm-CMOS 15-Giga-cell-updates-per-second DNA sequence alignment engine based on asynchronous race conditions
A Madhavan, T Sherwood, D Strukov
2017 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2017
High-throughput pattern matching with CMOL FPGA circuits: Case for logic-in-memory computing
A Madhavan, T Sherwood, DB Strukov
IEEE transactions on very large scale integration (VLSI) systems 26 (12 …, 2018
Boosted race trees for low energy classification
G Tzimpragos, A Madhavan, D Vasudevan, D Strukov, T Sherwood
Proceedings of the Twenty-Fourth International Conference on Architectural …, 2019
Vertical integration of memristors onto foundry CMOS dies using wafer-scale integration
J Rofeh, A Sodhi, M Payvand, MA Lastras-Montaño, A Ghofrani, ...
2015 IEEE 65th Electronic Components and Technology Conference (ECTC), 957-962, 2015
A configurable CMOS memory platform for 3D-integrated memristors
M Payvand, A Madhavan, MA Lastras-Montaño, A Ghofrani, J Rofeh, ...
2015 IEEE International Symposium on Circuits and Systems (ISCAS), 1378-1381, 2015
Temporal memory with magnetic racetracks
H Vakili, MN Sakib, S Ganguly, M Stan, MW Daniels, A Madhavan, ...
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 6 …, 2020
Streaming batch eigenupdates for hardware neural networks
BD Hoskins, MW Daniels, S Huang, A Madhavan, GC Adam, N Zhitenev, ...
Frontiers in neuroscience 13, 793, 2019
Temporal computing with superconductors
G Tzimpragos, J Volk, D Vasudevan, N Tsiskaridze, G Michelogiannakis, ...
IEEE Micro 41 (3), 71-79, 2021
Race logic: abusing hardware race conditions to perform useful computation
A Madhavan, T Sherwood, D Strukov
IEEE Micro 35 (3), 48-57, 2015
3D ReRAM arrays and crossbars: Fabrication, characterization and applications
GC Adam, B Chrakrabarti, H Nili, B Hoskins, MA Lastras-Montaño, ...
2017 IEEE 17th International Conference on Nanotechnology (IEEE-Nano), 844-849, 2017
Storing and retrieving wavefronts with resistive temporal memory
A Madhavan, MD Stiles
IEEE International Symposium on Circuits and Systems (ISCAS), 2019
Energy efficient computation with asynchronous races
A Madhavan, T Sherwood, D Strukov
Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016
Mapping of image and network processing tasks on high-throughput CMOL FPGA circuits
A Madhavan, DB Strukov
2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip …, 2012
A novel shape based batching and prediction approach for time series using HMMS and FISS
S Srivastava, S Bhardwaj, A Madhvan, JRP Gupta
2010 10th International Conference on Intelligent Systems Design and …, 2010
Impact ionization-induced bistability in CMOS transistors at cryogenic temperatures for capacitorless memory applications
A Zaslavsky, CA Richter, PR Shrestha, BD Hoskins, ST Le, A Madhavan, ...
Applied Physics Letters 119 (4), 043501, 2021
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