| A new method to express functional permissibilities for LUT based FPGAs and its applications S Yamashita, H Sawada, A Nagoya Proceedings of International Conference on Computer Aided Design, 254-261, 1996 | 102 | 1996 |
| Logic synthesis for look-up table based FPGAs using functional decomposition and support minimization H Sawada, T Suyama, A Nagoya Proceedings of IEEE International Conference on Computer Aided Design (ICCAD …, 1995 | 86 | 1995 |
| SPFD: A new method to express functional flexibility S Yamashita, H Sawada, A Nagoya IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2000 | 67 | 2000 |
| PCA-1: A fully asynchronous, self-reconfigurable LSI R Konishi, H Ito, H Nakada, A Nagoya, K Oguri, N Imlig, T Shiozawa, ... Proceedings Seventh International Symposium on Asynchronous Circuits and …, 2001 | 56 | 2001 |
| Solving satisfiability problems using reconfigurable computing T Suyama, M Yokoo, H Sawada, A Nagoya IEEE Transactions on Very Large Scale Integration (VLSI) Systems 9 (1), 109-116, 2001 | 55 | 2001 |
| High-level synthesis design at NTT systems labs Y NAKAMURA, K Oguri, A Nagoya, M Yukishita, R Nomura IEICE TRANSACTIONS on Information and Systems 76 (9), 1047-1054, 1993 | 45 | 1993 |
| Synthesis from pure behavioral descriptions Y Nakamura, K Oguri, A Nagoya High-Level VLSI Synthesis, 205-229, 1991 | 43 | 1991 |
| Dynamically reconfigurable logic LSI: PCA-2 H Ito, R Konishi, H Nakada, H Tsuboi, Y Okuyama, A Nagoya IEICE TRANSACTIONS on Information and Systems 87 (8), 2011-2020, 2004 | 30 | 2004 |
| New methods to find optimal non-disjoint bi-decompositions S Yamashita, H Sawada, A Nagoya Proceedings of 1998 Asia and South Pacific Design Automation Conference, 59-68, 1998 | 29 | 1998 |
| Function reconfigurable semiconductor device and integrated circuit configuring the semiconductor device K Aoyama, H Sawada, A Nagoya, K Nakajima, T Shibata US Patent 7,075,827, 2006 | 22 | 2006 |
| Restructuring logic representations with easily detectable simple disjunctive decompositions H Sawada, S Yamashita, A Nagoya Proceedings Design, Automation and Test in Europe, 755-759, 1998 | 22 | 1998 |
| Logic synthesis for look-up table based FPGAs using functional decomposition and Boolean resubstitution H Sawada, T Suyama, A Nagoya IEICE TRANSACTIONS on Information and Systems 80 (10), 1017-1023, 1997 | 20 | 1997 |
| A hierarchical behavioural description based CAD system Y Nakamura, K Oguri, A Nagoya, R Nomura [Proceedings] EURO ASIC90, 282-287, 1990 | 17 | 1990 |
| A hierarchical clustering method for the multiple constant multiplication problem A Matsuura, M Yukishita, A Nagoya IEICE Transactions on Fundamentals of Electronics, Communications and …, 1997 | 16 | 1997 |
| Restricted simple disjunctive decompositions based on grouping symmetric variables H Sawada, S Yamashita, A Nagoya Proceedings Great Lakes Symposium on VLSI, 39-44, 1997 | 16 | 1997 |
| An efficient hierarchical clustering method for the multiple constant multiplication problem A Matsuura, M Yukishita, A Nagoya Proceedings of ASP-DAC'97: Asia and South Pacific Design Automation …, 1997 | 16* | 1997 |
| Solving satisfiability problems on FPGAs using experimental unit propagation T Suyama, M Yokoo, A Nagoya International Conference on Principles and Practice of Constraint …, 1999 | 15 | 1999 |
| Convolutional neural network implementations using Vitis AI A Ushiroyama, M Watanabe, N Watanabe, A Nagoya 2022 IEEE 12th Annual Computing and Communication Workshop and Conference …, 2022 | 11 | 2022 |
| Vitis AIを用いたCNN実装 後山晃彦，渡邊誠也，名古屋彰，渡邊実， 電子情報通信学会技術研究報告; 信学技報 121 (175), 13-18, 2021 | 11* | 2021 |
| A hardware/software codesign method for a general purpose reconfigurable co-processor S Kimura, M Yukishita, Y Itou, A Nagoya, M Hirao, K Watanabe Proceedings of 5th International Workshop on Hardware/Software Co Design …, 1997 | 11 | 1997 |
