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Konstantin Shibin
Konstantin Shibin
Verified email at ati.ttu.ee
Title
Cited by
Cited by
Year
Effective scalable IEEE 1687 instrumentation network for fault management
A Jutman, S Devadze, K Shibin
IEEE Design & Test 30 (5), 26-35, 2013
372013
Asynchronous fault detection in IEEE P1687 instrument network
K Shibin, S Devadze, A Jutman
2014 IEEE 23rd North Atlantic Test Workshop, 73-78, 2014
212014
Health management for self-aware socs based on ieee 1687 infrastructure
K Shibin, S Devadze, A Jutman, M Grabmann, R Pricken
IEEE Design & Test 34 (6), 27-35, 2017
162017
Reliable health monitoring and fault management infrastructure based on embedded instrumentation and IEEE 1687
A Jutman, K Shibin, S Devadze
2016 IEEE AUTOTESTCON, 1-10, 2016
162016
On-line fault classification and handling in IEEE1687 based fault management system for complex SoCs
K Shibin, S Devadze, A Jutman
2016 17th Latin-American Test Symposium (LATS), 69-74, 2016
162016
System and method for optimized board test and configuration
S Devadze, A Jutman, I Aleksejev, K Shibin, T Wenzel
US Patent 9,164,858, 2015
142015
IEEE 1687 compliant ecosystem for embedded instrumentation access and in-field health monitoring
A Tsertov, A Jutman, K Shibin, S Devadze
2018 IEEE AUTOTESTCON, 1-9, 2018
72018
Designing reliable cyber-physical systems
G Aleksandrowicz, E Arbel, R Bloem, TD ter Braak, S Devadze, G Fey, ...
Languages, Design Methods, and Tools for Electronic System Design: Selected …, 2018
72018
Virtual reconfigurable scan-chains on FPGAs for optimized board test
I Aleksejev, S Devadze, A Jutman, K Shibin
2015 16th Latin-American Test Symposium (LATS), 1-6, 2015
62015
Understanding fault-tolerance vulnerabilities in advanced SoC FPGAs for critical applications
N Cherezova, K Shibin, M Jenihhin, A Jutman
Microelectronics Reliability 146, 115010, 2023
22023
On-Chip Sensors Data Collection and Analysis for SoC Health Management
K Shibin, M Jenihhin, A Jutman, S Devadze, A Tsertov
2023 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2023
12023
Designing reliable cyber-physical systems overview associated to the special session at FDL'16
G Aleksandrowicz, E Arbel, R Bloem, T Ter Braak, S Devadze, G Fey, ...
2016 Forum on Specification and Design Languages (FDL), 1-8, 2016
12016
Optimization of Boundary Scan Tests Using FPGA-Based Efficient Scan Architectures
I Aleksejev, S Devadze, A Jutman, K Shibin
Journal of Electronic Testing 32, 245-255, 2016
12016
Open-Source JTAG Simulator Bundle for Labs
K Shibin, S Devadze, V Rosin, A Jutman, R Ubar
International Journal of Electronics and Telecommunications 58, 233-239, 2012
2012
Trainer 1149: a Boundary Scan Simulation Bundle for Labs
A Jutman, R Ubar, S Devadze, K Shibin, V Rosin
Proceedings of the 18th International Conference Mixed Design of Integrated …, 2011
2011
Understanding Boundary Scan Test with Trainer 1149
A Jutman, R Ubar, S Devadze, K Shibin, V Rosin
2011 Proceedings of the 22nd EAEEIE Annual Conference (EAEEIE), 1-6, 2011
2011
IEEE P1687 IJTAG demonstrator on FPGA
K Shibin, I Aleksejev, A Jutman, S Devadze
Fault Management Instrumentation Network based on IEEE P1687 IJTAG
K Shibin, A Jutman, S Devadze
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